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半导体芯片AD8532ARZ中文规格书

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Data Sheet

TYPICAL PERFORMANCE CHARACTERISTICS

1.0TA = 25°C1 CHANNEL0.9CL = 50pF0.80.7VCCA = 3.3V, VCCY = 5VADG3304

3.02.5TA = 25°C1 CHANNELCL = 15pF2.0ICCA (mA)0.50.40.30.20.104860-004ICCY (mA)0.6VCCA = 3.3V, VCCY = 5V1.5VCCA = 1.8V, VCCY = 3.3V1.0VCCA = 1.8V, VCCY = 3.3V0.505101520253035DATA RATE (Mbps)40455005101520253035404550DATA RATE (Mbps)Figure 5. ICCA vs. Data Rate (A→Y Level Translation)

10TA = 25°C1 CHANNEL9CL = 50pF87Figure 8. ICCY vs. Data Rate (Y→A Level Translation)

1.61.41.2TA =25°C1 CHANNELVCCA = 1.2VVCCY = 1.8V20MbpsVCCA = 3.3V, VCCY = 5VICCY (mA)543210051015VCCA = 1.2V, VCCY = 1.8V04860-005ICCY (mA)61.00.810Mbps0.60.40.21Mbps04860-01204860-013VCCA = 1.8V, VCCY = 3.3V5Mbps20253035DATA RATE (Mbps)404550013233343536373CAPACITIVE LOAD (pF)Figure 6. ICCY vs. Data Rate (A→Y Level Translation)

Figure 9. ICCY vs. Capacitive Load at Pin Y for A→Y (1.2 V→1.8 V)

Level Translation

3.02.5TA = 25°C1 CHANNELCL = 15pFVCCA = 3.3V, VCCY = 5V1.00.90.8TA = 25°C1 CHANNELVCCA = 1.2VVCCY =1.8V2.00.7ICCA (mA)ICCA (mA)0.60.50.40.30.220Mbps1.51.0VCCA = 1.8V, VCCY = 3.3V0.5VCCA = 1.2V, VCCY = 1.8V04860-00610Mbps5Mbps1Mbps0.100510152025303540455001323DATA RATE (Mbps)3343CAPACITIVE LOAD (pF)53Figure 7. ICCA vs. Data Rate (Y→A Level Translation)

Figure 10. ICCA vs. Capacitive Load at Pin A for Y→A (1.8 V→1.2 V)

Level Translation

Rev. E | Page 9 of 21

04860-0070VCCA = 1.2V, VCCY = 1.8V0VCCA = 1.2V, VCCY = 1.8VADG3304 TERMINOLOGY

VIHA

Logic input high voltage at Pin A1 to Pin A4. VILA

Logic input low voltage at Pin A1 to Pin A4. VOHA

Logic output high voltage at Pin A1 to Pin A4. VOLA

Logic output low voltage at Pin A1 to Pin A4. CA

Capacitance measured at Pin A1 to Pin A4 (EN = 0). ILA, Hi-Z

Leakage current at Pin A1 to Pin A4 when EN = 0 (high impedance state at Pin A1 to Pin A4). VIHY

Logic input high voltage at Pin Y1 to Pin Y4. VILY

Logic input low voltage at Pin Y1 to Pin Y4. VOHY

Logic output high voltage at Pin Y1 to Pin Y4. VOLY

Logic output low voltage at Pin Y1 to Pin Y4. CY

Capacitance measured at Pin Y1 to Pin Y4 (EN = 0). ILY, Hi-Z

Leakage current at Pin Y1 to Pin Y4 when EN = 0 (high impedance state at Pin Y1 to Pin Y4). VIHEN

Logic input high voltage at the EN pin. VILEN

Logic input low voltage at the EN pin. CEN

Capacitance measured at EN pin. ILEN

Enable (EN) pin leakage current.

tEN

Three-state enable time for Pin A1 to Pin A4 and Pin Y1 to Pin Y4.

tP, A→Y

Propagation delay when translating logic levels in the A→Y direction.

tR, A→Y

Rise time when translating logic levels in the A→Y direction.

Data Sheet

TF, A→Y

Fall time when translating logic levels in the A→Y direction. DMAX, A→Y

Guaranteed data rate when translating logic levels in the A→Y direction under the driving and loading conditions specified in Table 1.

TSKEW, A→Y

Difference between propagation delays on any two channels when translating logic levels in the A→Y direction.

tPPSKEW, A→Y

Difference in propagation delay between any one channel and the same channel on a different part (under same driving/ loading conditions) when translating in the A→Y direction. tP, Y→A

Propagation delay when translating logic levels in the Y→A direction.

tR, Y→A

Rise time when translating logic levels in the Y→A direction. tF, Y→A

Fall time when translating logic levels in the Y→A direction. DMAX, Y→A

Guaranteed data rate when translating logic levels in the Y→A direction under the driving and loading conditions specified in Table 1.

tSKEW, Y→A

Difference between propagation delays on any two channels when translating logic levels in the Y→A direction.

tPPSKEW, Y→A

Difference in propagation delay between any one channel and the same channel on a different part (under the same driving/ loading conditions) when translating in the Y→A direction. VCCA

VCCA supply voltage. VCCY

VCCY supply voltage. ICCA

VCCA supply current. ICCY

VCCY supply current.

IHi-Z, A

VCCA supply current during three-state mode (EN = 0). IHi-Z, Y

VCCY supply current during three-state mode (EN = 0).

Rev. E | Page 16 of 21

半导体芯片AD8532ARZ中文规格书

DataSheetTYPICALPERFORMANCECHARACTERISTICS1.0TA=25°C1CHANNEL0.9CL=50pF0.80.7VCCA=3.3V,VCCY=5VADG33043.02.5TA=25°C1CHANNELCL=15pF2.0ICCA(mA)0.50.40.30.20.1
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